Architecture-Native · Secure by Default
Security is no longer a post-hoc patch, but an inherent component of the processor—delivering out-of-the-box, secure-by-default operation.
JA700 · Secure Mission Processor
JA700 安全任务处理器
From "Passive Defense" to Active Immunity
JA700 integrates security capabilities into the processor's underlying architecture, delivering end-to-end protection from boot to runtime with native PUF authentication, PQC quantum security, and dynamic heterogeneous redundancy.
Physically Unclonable Function (PUF)Dynamic Heterogeneous RedundancyPQC Post-Quantum CryptographyAutomotive-Grade 1 High Reliability
01 · Advanced Architecture
Advanced Architecture Security Born from Architecture
JA700 does not attach a security module to a conventional processor. Instead, it builds an intrinsic security system from the chip design origin, achieving zero trust through hardware-level fine-grained access control and active defense.
Chain of Trust from Power-On
An immutable chain of trust is established from the first voltage signal, progressively protecting the integrity of BOOT, OS, and execution environment.
Heterogeneous Cores
Multiple different processor cores operate cooperatively, making it difficult for vulnerabilities targeting a single instruction set or architecture to spread laterally.
Dynamic Arbitration and Fault Isolation
Hardware compares multi-core execution results in real time, identifying and isolating anomalous cores while task continuity is maintained by healthy cores.
Separation of Powers
An independent security state monitor core forms an on-chip mechanism of checks and balances among decision-making, execution, and oversight.
02 · Defense in Depth
Multi-Layered Security Protection Covering the Full Computing Lifecycle
From trusted boot and sensitive task execution to cryptographic operations, JA700 establishes layered, dynamic, and verifiable security boundaries across the entire runtime.
01
Trusted Computing
A built-in hardware root of trust progressively measures the boot and runtime stages; any detected tampering halts further execution.
02
Confidential Computing
Isolates and secures critical tasks extracted for cloud and AI scenarios, ensuring that even highly privileged administrators cannot access sensitive plaintext data.
03
Cryptographic Acceleration and PQC
Integrates co-processors for Chinese cryptographic algorithms and international algorithms, supporting Kyber, Dilithium, Sphincs+, and provably secure custom PQC algorithms.
04
Fully Self-Developed Security Cores
Integrates a RISC-V-compatible security AP core, a classical public-key and quantum-resistant integrated KP core, and an independent security policy SP core.
03 · Industrial Readiness
Full Industrialization Features Security Capabilities Truly Delivered
The team combines nearly thirty years of expertise in security, cryptography, and applications to achieve engineering balance among performance, power, cost, packaging, interfaces, certification, DFT/DFM/DFD, and high-volume production.
Excellent Performance
256-bit ECC sign-verify reaches 5,000 ops/sec and Dilithium signing reaches 50,000 ops/sec; embedded NVM endures over 15 million erase/write cycles at 125 °C, with PUF stability on the order of 10⁻¹³.
Broad Industry Compatibility
Supports EVM, WASM, and native applications, smart contracts, and TLS 1.3, and is compatible with StrongBox, eSIM, HSM, eSE, Secure Boot, TPM, AUTOSAR, and GP IoT.
High-Reliability Active Fault Tolerance
Employs active fault tolerance, multi-mode redundancy, and forward error correction to safeguard assets and maintain mission continuity under attack, targeting automotive-grade 1 reliability.
Complete Development Ecosystem
Provides a GEM5-based, adjustable-precision software simulation environment and a full-stack toolchain, enabling rapid customer development, verification, and volume production.
Measured on Silicon
Measured on Real Silicon
The metrics below follow international standard test methods, reflecting a balanced combination of security, performance, and reliability.
5,000ops/sec256-bit ECC sign-verify
50,000ops/secDilithium signing
15M+cycles125 °C NVM erase/write endurance
10⁻¹³orderPUF stability
Note: The above are measured results from real silicon. Individual cryptographic performance metrics across different processes, memory architectures, and application constraints should not be directly compared without considering security, reliability, and cost.
Industry Adoption
Multi-Industry Adoption
JA700 is advancing deployment in critical industries that demand long-term security, continuous operation, and high reliability.
JA700 Paradigm Shift
Moving Chip Security from Passive Defense to Active Immunity
JA700 leverages PUF for native authentication, PQC for the quantum era, and dynamic heterogeneous redundancy for end-to-end protection from boot to runtime, while delivering broad compatibility, high performance, and high reliability.