Product Center

Jahport Secure Chip Products
Secure Chips

The portfolio covers Secure Elements (SE), Security MCUs, Secure Connectivity SoCs, and automotive-grade security products. Built on a hardware root of trust, it delivers identity authentication, key protection, data encryption, secure connectivity, and trusted computing capabilities, forming a native security foundation for consumer electronics, IoT, industrial, and automotive applications.

Authentication Chips

Hardware-level unique ID based on PUF (Physically Unclonable Function) technology, low cost and low power, providing a native Root of Trust for consumable anti-counterfeiting, copyright protection, and IoT authentication.

JC100

Secure MCUs

Cost-effective general-purpose security MCU supporting key self-destruction, battery backup, and attack-resistant design, handling both business logic and authentication, suitable for IoT and industrial control scenarios.

JC200JC300JC400

Secure Connectivity SoCs

Ultra-low-power secure Bluetooth SoC certified by Apple MFi and Google ecosystems, as well as Bluetooth + Wi-Fi dual-mode and multi-protocol secure connectivity chips.

JC511JC571JC573

Automotive Security SoCs

Compliant with AEC-Q100 Grade 1/Grade 2, with native support for PQC (Post-Quantum Cryptography) algorithms, building a hardware Root of Trust for V2X, OTA, and in-vehicle gateways.

JA700JA701

Server Cryptographic Chips

High-performance server cryptographic chip supporting Chinese cryptographic algorithms (SM2/SM3/SM4), enabling cryptographic machines, encryption cards, and cloud key management, covering full-process cryptographic acceleration and multi-layer protection.

JS200

Full-Line Selection Support

Selection guides, dev kits, reference designs and pre-certification support to speed up your launch.

Product Series

automotive-grade secure SoC Series

AEC-Q100 Grade 1 CC EAL5+ Chinese Commercial Cryptography Level 2 PQC PUF

JA700 · Automotive-Grade High-Performance Secure SoC (AEC-Q100 Grade 1) Supporting PQC Post-Quantum Cryptographic Algorithms

The JA700 series are automotive-grade high-performance secure SoCs launched by Jahport, compliant with the AEC-Q100 Grade 1 standard. They are suitable for V2X communication units, central gateways, and in-vehicle ECU communication devices requiring high-level security protection, providing robust encryption and authentication capabilities. The JA700 series comprehensively covers international mainstream cryptographic standards, Chinese commercial cryptography standards, and PQC algorithm systems. Adopting an advanced hardware security architecture, it integrates PUF technology, hardware cryptographic acceleration engines, and anti-tamper detection mechanisms, effectively resisting various physical-layer threats such as side-channel attacks and fault injection attacks. It provides a solid hardware root of trust for in-vehicle network security and delivers future-oriented quantum-resistant security protection for critical services such as V2X communication, certificate issuance, and OTA upgrades.

JA700 Chip Concept Diagram
Physically Unclonable Function (PUF)Native authentication based on Physically Unclonable Function
PQC Quantum SecurityNative support for ML-KEM / ML-DSA / SLH-DSA, with an integrated design of traditional public-key and post-quantum cryptography
Multi-Core Heterogeneous DesignMulti-core heterogeneous architecture, achieving full-stack protection from boot to runtime based on dynamic heterogeneous redundancy
Bothnia Secure Operating SystemSupports application scenarios such as Secure Boot, eSE, eSIM, and HSM
PQC AEC-Q100 CC EAL5+ Commercial Cryptography Level 2

JA701 · Multi-Scenario Secure eSE Chip Supporting PQC Post-Quantum Cryptography

JA701 is a secure eSE chip launched by Jahport for smart terminal and consumer electronics scenarios. It is widely applicable to mobile eSE, smart home appliance eSE, digital car key, and smart terminal security configuration scenarios. It supports the Android StrongBox security system and can build a complete trusted security foundation for smart terminals.
The JA701 chip integrates core capabilities including secure boot, key protection, identity authentication, and secure execution. It supports Chinese cryptographic algorithms (SM2/SM3/SM4), international algorithms, and Post-Quantum Cryptography (PQC), providing hardware-level security protection for device identity, sensitive data, and critical services. Meanwhile, JA701 can work with terminals to implement local biometric secure matching and trusted authentication, isolating critical keys and sensitive data in an independent secure environment, effectively addressing security risks such as key leakage, data theft, unauthorized access, and device counterfeiting.

JA701 Chip Conceptual Diagram
PQC Post-Quantum CryptographySupports ML-KEM, ML-DSA and other quantum-resistant algorithms
Multi-Core Heterogeneous Secure Core128KB SRAM + 2MB FLASH, powerful performance
Trusted Execution EnvironmentSEE isolation protection, secure boot ensures integrity
Supports Android StrongBox Security SystemCompatible with mobile security ecosystem, rapid application deployment
Product Series

secure connectivity SoC Series

BLE 5.2 MFI Certified Ultra-Low-Power Apple Find My Network Google Find Hub

JC511 · Apple & Google Ecosystem Certified
Ultra-Low-Power Secure Bluetooth SoC

JC511 is a new-generation high-performance, ultra-low-power secure Bluetooth SoC from Jahport, supporting the BLE 5.2 protocol. Multiple solutions based on JC511 have passed Apple MFI certification and Google Find Hub certification. The JC511 secure Bluetooth SoC adopts an advanced power management architecture, with deep-sleep current as low as sub-microampere level. Combined with a flexible dynamic voltage scaling mechanism, it fully meets the long battery life requirements of coin-cell-powered devices. The chip integrates an independent hardware cryptographic engine, complemented by robust secure boot and firmware protection mechanisms, effectively safeguarding data transmission and device security. The JC511 secure Bluetooth SoC is suitable for low-power industrial data transmission and positioning, anti-loss trackers, car keys, smart door locks, luggage locks and tracking, remote controllers, campus cards, as well as general consumer Bluetooth applications.

JC511 chip concept image
Ultra-Low-PowerBluetooth Low Energy BLE 5.2, ultra-long battery life, and stable connection.
High-Security Hardware-Accelerated Cryptographic CoprocessorThe dedicated hardware-accelerated cryptographic coprocessor combined with custom algorithms enables JC511 to perform key operations at extremely high speed with ultra-low power consumption.
Apple Ecosystem Product CertificationCompliant with Apple MFI; multiple products powered by JC511 have passed Apple FHN certification
Google Ecosystem Product CertificationCompliant with Google Nearby; multiple products powered by JC511 have passed Google Find Hub certification
BLE 5.0 Wi-Fi b/g/n PUF Security Technology Chinese Cryptographic Algorithms Engine Rich Peripheral Interfaces

JC571 · High-Performance Bluetooth + Wi-Fi Dual-Mode Secure Connectivity SoC

JC571 is a high-performance, ultra-low-power secure connectivity SoC launched by Jahport. It supports BLE 5.0 and IEEE 802.11 b/g/n protocols, operates in the 2.4 GHz band, and adopts 1T1R (Single-Transmit Single-Receive) mode.
JC571 integrates a hardware security engine, is compatible with mainstream international algorithms and Chinese cryptographic algorithms (SM2/SM3/SM4), and features PUF and secure boot, providing robust security for smart home devices.
JC571 integrates a high-performance 32-bit processor with ample Flash and SRAM resources, meeting firmware storage and runtime data processing requirements in complex application scenarios. The chip offers a rich set of peripheral interfaces, including UART, SPI, I²C, PWM, ADC, etc., and supports flexible GPIO configuration for rapid integration with various sensors and actuators.

JC571 chip concept image
Dual-Mode Wireless ConnectivitySupports BLE 5.0 and Wi-Fi b/g/n
High-Security Hardware-Accelerated Cryptographic CoprocessorCompatible with international algorithms and Chinese cryptographic algorithms
PUF Security TechnologyPhysically Unclonable Function (PUF) for anti-tamper
Rich Peripheral InterfacesUART / SPI / I²C / PWM / ADC, etc.
Wi-Fi 6 BLE 5.3 PUF Security Chinese Cryptographic Algorithms (SM2/SM3/SM4)

JC573 · High-performance Bluetooth + Wi-Fi Dual-mode Secure Connection SoC

The JC573 is a high-performance, ultra-low-power Wi-Fi 6 + BLE 5.3 secure connection SoC launched by Jahport. It supports simultaneous Wi-Fi 6 and BLE 5.3 dual-mode operation, covering STA, SoftAP, and hybrid working modes, with an integrated high-reliability RF coexistence mechanism that effectively ensures communication stability for smart speakers, cameras, sensor gateways, and other devices in dense networking environments. The JC573 secure connection SoC integrates PUF and TRNG (True Random Number Generator), supports secure boot and hardware anti-rollback protection, and fully supports Chinese cryptographic algorithms (SM2/SM3/SM4) and mainstream international algorithms, providing security guarantees for every connected device. The JC573 secure connection SoC integrates an MJPEG encoder, a DVP image interface, and rich audio processing capabilities, enabling a single chip to support the complete functional requirements of mainstream smart home audio and video terminals.

JC573 chip concept illustration
Dual-mode Concurrent OperationWi-Fi 6 and BLE 5.3 operating simultaneously
Hardware SecurityPUF and TRNG, anti-rollback protection
Audio/Video ProcessingMJPEG encoder and DVP interface
Rich InterfacesSPI/I2C/UART/USB, etc.
Product Series

anti-counterfeiting authentication chip Series

PUF Security Technology Chinese Cryptographic Algorithms Anti-Board Cloning Anti-SPA/DPA Power Attack Consumable Anti-Counterfeiting

JC100 · Low-Cost PUF Anti-Counterfeiting Authentication Chip Compatible with Multi-Algorithm Systems

The JC100 series is a low-cost PUF anti-counterfeiting authentication chip launched by Jahport, compatible with multi-algorithm systems. It is designed for consumer electronics and industrial IoT scenarios such as accessory anti-counterfeiting, device identity authentication, and industrial sensor nodes. Targeting the market pain points of resource-constrained IoT terminal devices with urgent security needs, the JC100 series delivers low-cost, high-security industrial-grade anti-counterfeiting authentication with extremely low power consumption and minimal silicon area. It can be seamlessly embedded into terminal products with strict constraints on both footprint and battery capacity, providing continuous hardware-level security protection for devices. The PUF silicon-fingerprint technology integrated in the JC100 series gives each chip a naturally unclonable unique identity, and no keys are stored on the chip itself, eliminating the security risks of key pre-storage and key management at the root.

JC100 Chip Concept Diagram
PUF Security TechnologyHardware-level unclonable unique ID, no key storage required
TRNG True Random NumberHigh-quality random numbers, anti-replay attack
Anti-SPA/DPA AttackPower balancing and noise injection, side-channel resistance
Multi-Algorithm CompatibilitySupports SM2/SM3/SM4 and RSA/ECC/SHA
Product Series

secure MCU Series

TRNG Hardware CRC Low Power Single-Chip Design

JC200 · Secure MCU Handling Both Business and Authentication

JC200 is a general-purpose secure MCU that handles both business logic and authentication. It is primarily designed for general security protection scenarios. It can serve as an authentication and protection module with I²C/Onewire/SPI interfaces, satisfying basic control requirements such as peripheral driver and data acquisition, while integrating built-in cryptographic algorithm engines and secure storage. This delivers both security capabilities and general computing capability on a single chip. The JC200 secure MCU adopts an integrated operation architecture that unifies business logic and security functions, enabling security operations such as device identity authentication, data encryption/decryption, and command signature verification to be executed collaboratively with upper-layer business logic on the same chip. This series is suitable for smart cards, access controllers, industrial meters, secure reader/writer terminals, and other embedded secure devices, providing reliable technical support for scenarios requiring both business processing and security authentication.

JC200 chip concept image
Integrated OperationBusiness and security functions executed collaboratively
TRNG True Random NumberHardware-grade secure random number generator
Low Power DesignSleep current as low as 10μA
Single-Chip SolutionSimplifies system design and reduces cost
Commercial Cryptography Level 2 CCRC EAL4+ Chinese Cryptographic Algorithms Side-channel Resistant

JC300 · Multi-interface Large-memory High-performance General-purpose Secure MCU

JC300 is a cost-effective secure MCU from Jahport, designed for IoT, Industrial Internet, and intelligent security applications, balancing security capabilities, interface expansion, and low power consumption. JC300 integrates multiple Chinese and international cryptographic algorithms, supports storage encryption, random number generation, hardware firewall, and side-channel attack resistance mechanisms, providing comprehensive data and identity security protection for terminal devices. It integrates rich peripheral interfaces such as USB, UART, SPI, QSPI, I2C, 7816, and multiple GPIOs, supports low-power operation and expansion of various peripherals, offers excellent system compatibility and development flexibility, and has passed Commercial Cryptography Level 2 and CCRC EAL4+ security certifications, making it widely applicable to various secure terminals and embedded devices.

JC300 chip concept image
Comprehensive AlgorithmsSupports SM2/SM4/SM9 and other Chinese cryptographic algorithms
Security ProtectionHardware SPA/DPA and side-channel attack resistance
Rich InterfacesUSB/UART/SPI/7816 and other high-speed interfaces
Low PowerStandby current only 200μA
Chinese Cryptographic Algorithms Multiple Package Options Self-Destruct Protection High Security Level

JC400 · Anti-Attack Secure MCU with Key Zeroization and Battery Backup

JC400 series is a cost-effective secure MCU launched by Jahport, targeting IoT, Industrial Internet, and intelligent security applications, balancing security, performance, and flexible scalability. The product integrates multiple Chinese cryptographic and international algorithms, supporting hardware firewall, True Random Number Generator (TRNG), SPA/DPA attack resistance, and multi-sensor security detection, effectively enhancing device identity authentication, data encryption, and system protection capabilities. JC400 series also provides multiple communication interfaces including USB, UART, SPI, QSPI, and 7816, and supports low-power and wide-temperature operation, suitable for intelligent terminals, security authentication, industrial control, trusted connections, and various embedded security application scenarios.

JC400 chip conceptual image
High Security ProtectionSupports self-destruct input and independent battery power detection
Chinese Cryptographic Algorithm SupportSM2/SM4/SM3/SM1/SM7
Multiple Communication InterfacesUART/SPI/I2C/7816/USB
Multi-Package CompatibilityQFN40/QFN68/LQFP100
Product Series

server cryptographic chip Series

Commercial Cryptography Certification Chinese Cryptographic Algorithms True Random Number Generator (TRNG) High Endurance

JS200 · High-performance Chinese Cryptographic Server Cryptographic Chip

The JS200 series is a high-performance general-purpose server secure chip independently developed by Jahport. It integrates a 32-bit secure CPU core, 64KB SRAM, and 512KB Flash, supports Chinese and international mainstream cryptographic algorithms, and features a True Random Number Generator (TRNG), multiple communication interfaces, and high-level security protection capabilities. It is widely applicable in server applications.

JS200 Chip Concept Diagram
Secure Core32-bit secure CPU core
Storage ProtectionSRAM/Flash encryption and scrambling
True Random NumberCompliant with FIPS 140-2 / AIS31 P2
High EnduranceFlash write/erase cycles over 100,000
Product Series

secure connectivity module

BLE 5.2 BQB Certified Secure CPU Ultra-Low Power

JMB10 Secure Bluetooth Module

The JMB10 Secure Bluetooth Module adopts the new-generation high-performance, ultra-low-power JC511 Bluetooth chip from Jahport, which supports the BLE 5.2 protocol. JMB10 features a 32-bit secure CPU core, with a maximum operating frequency of up to 64MHz, and integrates 512KB FLASH and 48KB SRAM on-chip, providing powerful processing capability and ample storage space for various Internet of Things (IoT) applications. Through flexible collaboration with an external MCU, JMB10 enables rapid deployment of a BLE slave device for stable data exchange with master devices such as smartphones and tablets, while maintaining low occupancy of external MCU resources, significantly simplifying the development process and improving development efficiency.

JMB10 Secure Bluetooth Module Concept Diagram
Secure CoreBuilt on a 32-bit secure CPU core (64MHz), supports BLE 5.1 protocol with BQB certification, integrates 512KB FLASH and 48KB SRAM, with TX/RX current of only 3.6~4.0mA and deep-sleep power consumption as low as 130nA.
Rich InterfacesUp to 19 multiplexed GPIOs available for flexible configuration, enabling more versatile peripheral connectivity. Integrated PCB antenna + external antenna interface optional.
Dual Operating ModesCan be used as a transparent transmission module, or as a standalone MCU; the module interface is a universal serial port supporting full-duplex bidirectional communication.
Multiple Cryptographic Algorithms SupportedBuilt-in symmetric (3DES/AES/SM4), hash (SHA series/MD5/SM3), and asymmetric (RSA/ECC/ECDSA/ECDH/SM2) cryptographic algorithms, meeting the security requirements of IoT devices.

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